Innosilicon's AI Boosting HMC memory chip is applicable for high speed and bandwidth and high-performance storage fields such as AI edge, data center, automation, etc.
This HMC memory embeds AI operation instructions and implements edge side onsite calculation and storage. It adopts different serdes technology to expand data transmission from PCB board wire distance to far-field and near-field transmission. In addition, based on the HMC2.1(Hybrid Memory Cube) protocol, the chip integrates GDDR6 IP and Samsung or Micron’s SIP Memory Cube on a die. For Xilinx and Altera's FPGA using the HMC1.1 protocol, Innosilicon's HMC memory chip can be a perfect substitution for the latest products in the market.
Innosilicon's AI Boosting HMC Memory brings high efficiency to a new level. With Innosilicon's innovation, the chip architecture can achieve this high efficiency, making the memory chip as efficient as an application specific integrated circuit (ASIC).
Support 12.5Gbps, 14Gbps, 15Gbps, 25Gbps, 28Gbps, 30Gbps, 32Gbps and SerDes Interface
Supports full-width (16-lanes), half-width (8-lanes), quarter-width link (4-lanes) , up to 128GB/s effective bandwidth
AI intructions: 8-bit and 16-bit INT fixed point matrix operation, Dual 8byte/Single 16byte signed add, 8/16byte memory cube bitwise, 16byte boolean operator, comparison atomics and so on(customed)
Supports 16, 32, 48, 64, 80, 96, 112, 128, and 256 byte CMD
Support WRITE, Posted WRITE, READ, mode read and write
Support Lane Reversal and Polarity
Support Cyclic Redundancy Check(CRC) Error detection and Retry
Support Poison Package Detect
Support Address Wrap, Block size is 32, 64, 128, 256 Byte
Support 6Gbps, 7Gbps, 8Gbps, 10Gbps, 12Gbps, 14Gbps, 16Gbps Data rate with the JESD250(GDDR6) Protocol
Support 4 separate independent channels(x16)
Support both Quad data rate(QDR) and double data rate(DDR) and (WCK) mode
Support ECC options and Error detection code(EDC)
Auto calibration with external ZQ resistor
Support Power Management
Support 2x16Gb GDDR6 DRAM
Easy to expand bandwidth
AI edge side computing
High bandwidth storage
and so on